Design engineer

Job Description

Job Description:
Hands-on experience with Scan, EDT, SSN insertion, ATPG coverage improvement, Pattern Generation/Simulation. Should have expertise on Simulation debug No-timing/Timing. Hands-on Experience to do MBIST Insertion, Verification including Repair mode, Pattern generation. Spy Glass experience to resolve DFT DRC at RTL stage. So C Translation flow, Patterns hand-off. Post Silicon Debug on Tester. Strong co-working experience with other dependent functions, Constraints development, STA & Physical Design. Should be able to handle team of 4-6 members. Drive team towards meeting Milestone in high pressure situation. Added advantage if Lead has executed 2-3 Projects in Intel flow.